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metal can in 2 top view s 2 v d 2 d 1 v+ (substrate and case) s 1 in 1 nc gnd 1 2 3 4 5 6 7 8 9 10 nc v+ d 1 d 2 nc nc s 1 s 2 nc in 2 in 1 nc gnd v dual-in-line 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view dg300a dg300a dg300a/301a/302a/303a siliconix s-52880erev. c, 28-apr-97 1 cmos analog switches features benefits applications analog signal range: 15 v fast switchinget on : 150 ns low on-resistanceer ds(on) : 30 single supply operation latch-up proof cmos compatible full rail-to-rail analog signal range low signal error low power dissipation low level switching circuits programmable gain amplifiers portable and battery powered systems description the dg300a-dg303a family of monolithic cmos switches feature three switch configuration options (spst, spdt, and dpst) for precision applications in communications, instrumentation and process control, where low leakage switching combined with low power consumption are required. designed on the siliconix plus-40 cmos process, these switches are latch-up proof, and are designed to block up to 30 v peak-to-peak when off. an epitaxial layer prevents latchup. in the on condition the switches conduct equally well in both directions (with no offset voltage) and minimize error conditions with their low on-resistance. featuring low power consumption (3.5 mw typ) these switches are ideal for battery powered applications, without sacrificing switching speed. designed for break-before-make switching action, these devices are cmos and quasi ttl compatible. single supply operation is allowed by connecting the v rail to 0 v. functional block diagram and pin configuration truth table logic switch 0 off 1 on logic a 0 o 08v lo g ic a0o 0.8 v logic 0 0 . 8 v logic a 1 o 4v log i c a1o 4 v logic 1 4 v updates to this data sheet may be obtained via facsimile by calling siliconix faxback, 1-408-970-5600. please request faxback document #70044.
DG301A gnd v dual-in-line nc v+ d 1 d 2 nc nc s 1 s 2 nc nc in nc 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view metal can nc top view s 2 v d 2 d 1 v+ (substrate and case) s 1 in nc gnd 1 2 3 4 5 6 7 8 9 10 dg302a nc v+ s 3 s 4 d 3 d 4 d 1 d 2 s 1 s 2 in 1 in 2 gnd v dual-in-line 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view DG301A dg303a s 4 d 2 nc dual-in-line s 3 in 1 d 4 v d 1 s 1 gnd v+ in 2 d 3 s 2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view dg300a/301a/302a/303a 2 siliconix s-52880erev. c, 28-apr-97 functional block diagram and pin configuration (cont'd) truth table logic sw 1 sw 2 0 off on 1 on off logic a0o 0.8 v logic a1o 4 v logic 1 4 v

0 off 1 on logic a0o 0.8 v logic a1o 4 v truth table logic sw 1 , sw 2 sw 3 , sw 4 0 off on 1 on off logic a0o 0.8 v logic a1o 4 v
dg300a/301a/302a/303a siliconix s-52880erev. c, 28-apr-97 3 ordering information temp range package part number dg300a 0 to 70 c 14-pin plastic dip dg300acj 25 to 85 c 14-pin cerdip dg300abk 25 t o 85 c 10-pin metal can dg300aba dg300aak 14-pin cerdip dg300aak/883 55 to 125 c jm38510/11601bca 55 t o 125 c 14-pin sidebraze jm38510/11601bcc 10 - pin metal can dg300aaa/883 10 - pi n m e t a l c an jm38510/11601bia DG301A 0 to 70 c 14-pin plastic dip DG301Acj 25 to 85 c 14-pin cerdip DG301Abk 25 t o 85 c 10-pin metal can DG301Aba 14 - pin cerdip DG301Aak/883 14 - pi n c er dip jm38510/11602bca 55 to 125 c 14-pin sidebraze jm38510/11602bcc 55 t o 125 c DG301Aaa 10-pin metal can DG301Aaa/883 jm38510/11602bia dg302a 0 to 70 c 14-pin plastic dip dg302acj dg302aak 55 to 125 c 14-pin cerdip dg302aak/883 55 t o 125 c jm38510/11603bca 14-pin sidebraze jm38510/11603bcc dg303a 0 to 70 c 14-pin plastic dip dg303acj 25 to 85 c 14-pin cerdip dg303abk 45 to 85 c 14-soic dg303ady dg303aak 55 to 125 c 14-pin cerdip dg303aak/883 55 t o 125 c jm38510/11604bca 14-pin sidebraze jm38510/11604bcc
dg300a/301a/302a/303a 4 siliconix s-52880erev. c, 28-apr-97 absolute maximum ratings voltages referenced to v v+ 44 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd 25 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital inputs a , v s , v d (v) 2 v to (v+) +2v or . . . . . . . . . . . . . . . . . 30 ma, whichever occurs first current, any terminal 30 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current, s or d (pulsed at 1 ms, 10% duty cycle max) 100 ma . . . . . . . . . . . . . . . . . . . . storage temperature (a & b suffix) 65 to 150 c . . . . . . . . . . . . (c suffix) 65 to 125 c . . . . . . . . . . . . . . . . power dissipationb 14-pin plastic dip c 470 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-pin cerdip d 825 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-pin metal can e 450 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. signals on s x , d x , or in x exceeding v+ or v will be clamped by internal diodes. limit forward diode current to maximum current ratings. b. all leads welded or soldered to pc board. c. derate 6.5 mw/ c above 25 c d. derate 11 mw/ c above 75 c e. derate 6 mw/ c above 75 c schematic diagram (typical channel) figure 1. level shift/ drive v in s v+ gnd v d v v+
dg300a/301a/302a/303a siliconix s-52880erev. c, 28-apr-97 5 specifications a conditions unless other- wise specified v15vv 15v a suffix 55 to 125 c b/c suffix parameter symbol v+ = 15 v, v = 15 v v in = 0.8 v or v in = 4 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full 15 15 15 15 v drain-source on-resistance r ds(on) v d = 10 v, i s = 10 ma room full 30 50 75 50 75 source off leakage current i s(off) v s = 14 v v d = 14 v room hot 0.1 1 100 1 100 5 100 5 100 drain off leakage current i d(off) v s = 14 v , v d = 14 v room hot 0.1 1 100 1 100 5 100 5 100 na drain on leakage current i d(on) v d = v s = 14 v room hot 0.1 1 100 1 100 5 100 5 100 digital control input current with ivlhih i inh v in = 5 v room full 0.001 1 1 1 p input voltage high i inh v in = 15 v room full 0.001 1 1 1 a input current with input voltage low i inl v in = 0 v room full 0.001 1 1 1 dynamic characteristics turn-on time t on see figure 2 room 150 300 turn-off time t off s ee fi gure 2 room 130 250 ns break-before-make time t open DG301A/303a only figure 3 room 50 ns charge injection q c l = 1 nf, r gen = 0 v gen = 0 v, figure 4 room 8 pc source-off capacitance c s(off) room 14 drain-off capacitance c d(off) v s , v d = 0 v, f = 1 mhz room 14 channel-on capacitance c d(on) room 40 pf input capacitance c in f=1mhz v in = 0 v room 6 i npu t c apac it ance c in f = 1 mh z v in = 15 v room 7 off-isolation oirr v in = 0 v, r l = 1 k v 1 v f 500 kh room 62 db crosstalk (channel-to-channel) x talk in , l v s = 1 v rms , f = 500 khz room 74 db power supplies positive supply current i+ v in = 4 v (one input) all o h 0 v room full 0.23 0.5 1 1 ma negative supply current i in (p) all others = 0 v room full 0.001 10 100 100 positive supply current i+ v in = 0 8 v (all inputs) room full 0.001 10 100 100 a negative supply current i v in = 0 . 8 v (all i npu t s ) room full 0.001 10 100 100 notes: a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function.
dg300a/301a/302a/303a 6 siliconix s-52880erev. c, 28-apr-97 typical characteristics r ds(on) vs. v d and power supply charge injection vs. analog voltage switching time and break-before-make time vs. positive supply voltage r ds(on) vs. v d and temperature r ds(on) vs. v d and power supply voltage r ds(on) drain-source on-resistance ( ) ds(on) drain-source on-resistance ( ) r ds(on) drain-source on-resistance ( ) q (pc) (ns) t on ,t off v d drain voltage (v) v d drain voltage (v) v d drain voltage (v) v s source voltage (v) v+ positive supply (v) 90 25 15 5 5 15 25 70 50 30 10 5 v t a = 25 c 60 15 10 5 0 5 10 15 50 40 30 20 10 v+ = 15 v v = 15 v 0 5 10 15 20 20 v = 0 v t a = 25 c 50 15 10 5 0 5 10 15 40 30 20 10 0 v+ = 15 v v = 15 v c l = 1 nf 500 0 5 10 15 400 300 200 100 0 dg301/303 only t open t off t on v = 15 v t a = 25 c v inh = 4 v v inl = 0 v t a = 125 c t a = 25 c t a = 55 c 8 v 10 v 12 v 15 v 20 v 40 60 80 100 7.5 v 10 v 15 v 20 v input switching threshold vs. positive supply voltage v+ positive supply (v) (v) t v 0 5 4 3 2 1 51015 v = 15 v t a = 25 c
dg300a/301a/302a/303a siliconix s-52880erev. c, 28-apr-97 7 typical characteristics (cont'd) 10 supply current vs. temperature leakage vs. temperature switching time vs. power supply voltage off isolation and crosstalk vs. frequency supply curents vs. switching frequency temperature ( c) f frequency (hz) f frequency (hz) temperature ( c) supply voltage (v) i+, i ( a) (db) i+, i (ma) i s time (ns) 55 35 15 5 25 45 65 85 105 125 500 400 300 200 100 0 100 i+ i 55 35 15 5 25 45 65 85 105 125 v+ = 15 v v = 15 v v s , v d = 14 v 10 pa i d(on) i d(off) or i s(off) 100 pa 1 na 10 na 100 na 120 20 10 k 100 k 1 m 10 m v+ = +15 v v = 15 v r l = 50 crosstalk off isolation 100 80 60 40 15 0 +i i v+ = 15 v v = 15 v 5 10 1 k 10 k 100 k 1 m 400 350 300 250 200 150 100 50 0 v+ = 15 v v = 15 v t off t on , i d 12 14 16 18 20 22 switching time vs. temperature temperature ( c) 55 400 350 300 250 200 150 100 50 35 15 5 25 45 65 85 105 125 0 t off t on v+ = 15 v v = 15 v v s = 3 v time (ns) v+ = 15 v v = 15 v v in = 4 v (one input) (all other = 0 v)
dg300a/301a/302a/303a 8 siliconix s-52880erev. c, 28-apr-97 test circuits figure 2. switching time v s = 3 v r l r l + r ds(on) v o = v s c l (includes fixture and stray capacitance) v v+ in s c l 33 pf d 5 v r l 300 v o 15 v gnd +15 v 50% 90% 0 v 0 v 10% logic input switch output v s t on t off logic a1o = switch on figure 3. break-before-make spdt (DG301A, dg303a) 0 v 50% 50% 50% 0 v 0 v logic input switch output switch output logic a1o = switch on v inh v s1 v s2 v o1 v o2 t bbm v o1 s 2 s 1 d 2 r l2 300 c l2 33 pf v+ v s2 = 3 v in v s1 = 3 v r l1 300 c l1 33 pf c l (includes fixture and stray capacitance) v d 1 15 v gnd +15 v figure 4. charge injection on off on in x v o v o c l 1 nf 3 v v 15 v v o gnd v+ r g s v g d in +15 v
dg300a/301a/302a/303a siliconix s-52880erev. c, 28-apr-97 9 application hints a v+ positive supply voltage (v) v negative supply voltage (v) gnd voltage (v) v in logic input voltage v inh(min) /v inl(max) (v) v s or v d analog voltage range (v) 15 20 15 15 20 0 0 0 0 4/0.8 4/0.8 4/0.8 15 to 15 20 to 20 0 to 15 a. application hints are for design aid only, not guaranteed and not subject to production testing. applications the dg300a series of analog switches will switch positive analog signals while using a single positive supply. this facilitates their use in applications where only one supply is available. the trade-offs of using single supplies are: 1) increased r ds(on) ; 2) slower switching speed. the analog voltage should not go above or below the supply voltages which in single operation are v+ and 0 v. (see input switching threshold vs. positive supply voltage curve.) +15 v +15 v +15 v DG301A ttl input +5 v 10 k 10 k 5 k 5 k 100 k 10 f 50 k v out figure 5. single supply op amp switching
dg300a/301a/302a/303a 10 siliconix s-52880erev. c, 28-apr-97 applications (cont'd) diff. in b +15 v +15 v diff. in a DG301A dg302a gnd +15 v 15 v 15 v +15 v 15 v cmos logic input select high = diff. in b cmos logic gain select high = a v = 101 r 1 16 k r 1 1.5 k r 2 75 k 75 k r 2 75 k r 4 r 6 75 k v out 75 k r 5 67 k r 7 50 k v os null voltage gain of the instrumentation amplifier is:
figure 6. low power instrumentation amplifier with digitally selectable inputs and gain +

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